International Conference on Information and Knowledge Technology

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Two Novel Designs of Efficient Single-Bit Comparators in QCA Technology with Ultra-Low Energy Dissipation

Authors :

Shobeir Fayazi¹ Hatam Abdoli²

1- دانشگاه بوعلی سینا 2- دانشگاه بوعلی سینا

Keywords :

QCA،Single-Bit Comparator،Majority Gate،Energy Efficiency،Nano-scale design

Abstract :

Quantum-dot cellular automata (QCA) has emerged as an appealing substitute for conventional CMOS frameworks, providing benefits such as reduced energy consumption, increased component density, and accelerated performance at the nanoscale. Within digital architectures, comparators function as essential modules for numerous purposes, including arithmetic processing units and logical decision mechanisms. This investigation presents two innovative 1-bit comparator configurations in QCA: one utilizing a single-layer approach and the other employing a multilayer structure. Design 1 uses two layers and 23 cells, occupying 0.0154 μm² with a total energy dissipation of 1.97 × 10⁻² eV. Design 2 is single-layer, uses 15 cells, fits within 0.0135 μm², and lowers total dissipation to 5.68 × 10⁻³ eV. Simulations performed using QCADesigner and QCADesigner-E version 2.2 validate their operational integrity, energy optimization, and thermal distributions. Relative to prior QCA-based comparators, these configurations exhibit notable enhancements in cell quantity, spatial occupancy, and energy efficiency, rendering them appropriate for energy-constrained nanoscale systems. In relation to average metrics derived from analyzed studies, Design 1 realizes approximately 26% fewer cells, 63% reduced area, and 75% lower average energy per cycle, whereas Design 2 achieves 52% cell reduction, 68% area savings, and 93% diminished cycle energy.